Hardware performance monitoring
LibVolimem
Contributed to adapting in-VM PMU usage for performance monitoring in INRIA’s Volimem project, investigating counter access, measurement accuracy, virtualization overhead, and isolation.
- C / C++
- Linux
- PMUs
Hello, I’m Taha
Software engineer working across distributed systems, performance, and infrastructure—from auto-sharding control planes to hardware counters.
I work at the intersection of distributed systems, performance engineering, and low-level tooling. I’ve built auto-sharding control planes, optimized real-time ML inference, and brought memory profiling into CI/CD pipelines.
With a background in computer science and applied mathematics and an MSc focused on parallel and distributed systems, I care about performance you can measure and infrastructure other engineers can trust.
SWERC Participant
2023 · 2025
IYMC Bronze Award
2022
Systems projects built to explore isolation, scale, language design, and the hardware underneath it all.
Hardware performance monitoring
Contributed to adapting in-VM PMU usage for performance monitoring in INRIA’s Volimem project, investigating counter access, measurement accuracy, virtualization overhead, and isolation.
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APR 2026 — OCT 2026
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[paper]Slicer: Auto-Sharding for Datacenter ApplicationsAdya et al. · OSDI ’16JUN 2025 — AUG 2025
Huawei · Sophia Antipolis, France
Accelerated the RIFE real-time video frame interpolation model by 78% with only a 0.1–0.3% quality drop, targeting efficient mobile deployment.
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Murex · Paris, France
Built a CI/CD memory-profiling pipeline for equity derivatives instruments, improving profiling efficiency by 20–30% and making regressions visible across archived test runs.
2025 — 2026
Institut Polytechnique de Paris
Distributed systems, advanced operating systems, cloud infrastructure, high-performance computing, and performance optimization.
2021 — 2025
Télécom Paris
Algorithms, networks and security, graph theory, statistics and learning, complexity theory, and high-performance computing.